Analysis of self tuning methods for direct conversion transceivers


Integrated circuit fabrication technological processes affect error of transceiver’s components, thus aims to minimize such deviation. This paper analyzes modern wireless transceiver calibration methods: feedforward, feedback, hybrid and indirect. Main parameters to calibrate are: I/Q gain and phase imbalance, DC offset and second order input intercept point. For first time, relations between transceiver parameters, parameters to be calibrated and calibration methods are proposed.

Article in Lithuanian.

Belaidžio ryšio siųstuvų-imtuvų susiderinimo būdų analizė


Integrinių grandynų gamybos technologinių procesų paklaidos didina daugiastandarčių siųstuvų-imtuvų komponentų parametrų sklaidą ir blogina jų veiką, tad siekiama komponentų verčių nuokrypius kompensuoti. Pagrindiniai derinami parametrai yra tokie: siųstuvo ir imtuvo kvadratūrinių kanalų nuolatinės dedamosios, amplitudės ir fazės poslinkiai, antrosios eilės iškraipymai. Darbe išanalizuoti žinomi daugiastandarčių belaidžio ryšio siųstuvų-imtuvų derinimo būdai, jie suskirstyti į tiesioginio, netiesioginio ir grįžtamojo ryšio bei mišriuosius būdus. Ištirtos analoginės ir skaitmeninės modernių siųstuvų-imtuvų derinimo sistemos, atlikta jų privalumų ir trūkumų bei modernioms belaidžio ryšio sistemoms aktualių derinimo parametrų analizė.

Reikšminiai žodžiai: integrinis grandynas, daugiastandartis siųstuvas-imtuvas, derinimosi sistema, KMOP.

Keyword : integrated circuit, transceiver, tuning system, CMOS

How to Cite
Kladovščikov, L., & Navickas, R. (2018). Analysis of self tuning methods for direct conversion transceivers. Mokslas – Lietuvos Ateitis / Science – Future of Lithuania, 10.
Published in Issue
Oct 9, 2018
Abstract Views
PDF Downloads
Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.


Alegre, J., Calvo, B., & Celma, S. (2008, June–July). A high performance CMOS feedforward AGC circuit for wideband wireless receivers. 2008 IEEE International Symposium on Industrial Electronics (pp. 1657-1661). Cambridge, UK.

Alegre, J., Celma, S., Calvo, B., Fiebig, N., & Halder, S. (2009). SiGe Analog AGC Circuit for an 802.11a WLAN Direct Conversion Receiver. IEEE Transactions on Circuits and Systems II: Express Briefs, 56(2), 93-96.

Atalla, E., Bellaouar, A., & Balsara, P. (2013, August). IIP2 requirements in 4G LTE handset receivers. 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) (pp. 1132-1135). Columbus, OH, USA.

Chen, J., Renzhong, X., Weinan, L., Yumei, H., & Zhiliang, H. (2011, October). Reconfigurable low pass filter with Automatic Frequency Tuning for WCDMA and GSM application. 2011 9th IEEE International Conference on ASIC (pp. 1066-1069). China.

Cheng, J., Huang, F., Wu, L., Tian, Y., & Jiang, N. (2009, September). A High-Linearity, 60-dB Variable Gain Amplicier with Dual DC-Offset Cancellation for UWB Systems. 2009 5th International Conference on Wireless Communications, Networking and Mobile Computing (pp. 1-4). Beijing, China.

Danilovic, D., Milovanovic, V., Cathelin, A., Vladimirescu, A., & Nikolic, B. (2016, May). Low-power inductorless RF receiver front-end with IIP2 calibration through body bias control in 28nm UTBB FDSOI. 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) (pp. 87-90). San Francisco, CA, USA.

Dong, J., Jiang, H., Weng, Z., Zheng, J., Zhang, C., & Wang, Z. (2015, May). A fast AGC method for multimode zero-IF/sliding-IF WPAN/BAN receivers. 2015 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1310-1313). Lisbon, Portugal.

Dufrêne, K. (2007). Analysis and cancellation methods of second order intermodulation distortion in RFIC downconverion mixers (pp. 114-135). Universität Erlangen-Nürnberg.

Dufrene, K., Boos, Z., & Weigel, R. (2008). Digital adaptive IIP2 Calibration scheme for CMOS downconversion mixers. IEEE Journal of Solid-State Circuits, 43(11), 2434-2445.

Fan, C., Lu, Y., & Mao, C. (2009, January). Design of a Chebyshev low pass filter with automatic frequency calibration. 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia) (pp. 121-124). Shanghai, China.

Feng, Y., Takemura, G., Kawaguchi, S., Itoh, N., & Kinget, P. (2010, February). A low-power low-noise direct-conversion front-end with digitally assisted IIP2 background self calibration. 2010 IEEE International Solid-State Circuits Conference –(ISSCC) (pp. 70-71). San Francisco, CA, USA.

Feng, Y., Takemura, G., Kawaguchi, S., Itoh, N., & Kinget, P. (2011). Digitally assisted IIP2 calibration for CMOS direct-conversion receivers. IEEE Journal of Solid-State Circuits, 46(10), 2253-2267.

Furuta, Y., Heima, T., Sato, H., & Shimizu, T. (2007, January). A low flicker-noise direct conversion mixer in 0.13 um CMOS with dual-mode DC offset cancellation circuits. 2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (pp. 265-268). Long Beach, CA, USA.

Gao, J., Jiang, H., Zhang, L., Dong, J., & Wang, Z. (2012, August). A programmable low-pass filter with adaptive miller compensation for zero-IF transceiver. 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) (pp. 226-229). Boise, ID, USA.

Genesis Microchip Inc. (2007). Hybrid automatic gain control (AGC), US Patent US7222037 B2.

Heping, M., Fang, Y., Yin, S., & Dai, F. F. (2009). A multi-standard active-RC filter with accurate tuning system. Journal of Semiconductors, 30(9), 1-4.

Huang, G., Wu, Y., Zhong, C., & Lin, P. (2011, August). A DC-offset cancellation circuit for PGA in baseband communication. 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) (pp. 1-4). Seoul, South Korea.

Huang, Y., Li, W., Hu, S., Xie, R., Li, X., Fu, J., Sun, Y., Pan, Y., Chen, H., Jiang, C., Liu, J., Chen, Q., Qiu, D., Qin, Y., Hong, Z., & Zeng, X. (2013). A high-linearity WCDMA/GSM reconfigurable transceiver in 0.13um CMOS. IEEE Transactions on Microwave Theory and Techniques, 61(1), 204-217.

Huang, M., Xiaofeng, L., Guo, J., & Chen, D. (2015, March– April). A compact I/Q imbalance calibration technique for power-aware fully-integrated receiver without on-chip base-band processor. 2015 IEEE International Wireless Symposium (IWS 2015) (pp. 1-4). Shenzhen, China.

IBM. (2003). Foundry technologies 180-nm CMOS, RF CMOS and SiGe BiCMOS.

Inamori, M., Bostamam, A., Sanada, Y., & Minami, H. (2009). IQ imbalance compensation scheme in the presence of frequency offset and dynamic DC offset for a direct conversion receiver. IEEE Transactions on Wireless Communications, 8(5), 2214-2220.

Yen, M., Wu, C., & Chen, H. (2016, October). An automatic frequency tuning loop for the low pass filter of 400–800 MHz Spectrum sensing system. 2016 IEEE 5th Global Conference on Consumer Electronics (pp. 1-2). Kyoto, Japan.

Yin, Y., Chi, B., Yu, Q., Liu, B., & Wang, Z. (2013, November). A 0.1–5GHz SDR transmitter with dual-mode power amplifier and digital-assisted I/Q imbalance calibration in 65nm CMOS. 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) (205-208). Singapore, Singapore.

Yu, W., Cheang, C., Mak, P., Cheng, W., Un, K., Lok, U., & Martins, R. (2013). A nonrecursive digital calibration technique for joint elimination of transmitter and receiver I/Q imbalances with minimized add-on hardware. IEEE Transactions on Circuits and Systems II: Express Briefs, 60(8), 462-466.

Yu-Chih, C., Wei-Hao, C., Tsung-Hsien, L. (2008, April). A 120-MHz active-RC filter with an agile frequency tuning scheme in 0.18 um CMOS. 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT) (pp. 208-211). Hsin-chu, Taiwan.

Jacobus de Witt, J. (2011). Modelling, estimation and compensation of imbalances in quadrature transceivers (pp. 60-63). Stellenbosch University.

Jeon, O., Fox, R., & Myers, B. (2006). Analog AGC Circuitry for a CMOS WLAN Receiver. IEEE Journal of Solid-State Circuits, 41(10), 2291-2300.

Jiang, P., Lu, Z., Guan, R., & Zhou, J. (2013). All-Digital adaptive module for automatic background IIP2 calibration in CMOS downconverters with fast convergence. IEEE Transactions on Circuits and Systems II: Express Briefs, 60(7), 427-431.

Jinup, L., Youngjoo, C., Kyungsoo, J., Jongmin, P., Joongho, C., & Jaewhui, K. (2005, September). A wide-band active-RC filterwith a fast tuning scheme for wireless communication receivers. Proceedings of the IEEE 2005 Custom Integrated Circuits Conference (637-640). San Jose, CA, USA.

Kaczman, D., Shah, M., Alam, M., Rachedine, M., Cashen, D., Han, L., & Raghavan, A. (2009). A single-chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW-less CMOS Receiver With DigRF 3G Interface and +90 dBm IIP2. IEEE Journal of Solid-State Circuits, 44(3), 718-739.

Ken, X., Min, C., Xiaoyong, H., Zhijian, C., & Weiguo, Z. (2015, November). An automatic DC-Offset cancellation method and circuit for RF transceivers. 2015 IEEE 11th International Conference on ASIC (ASICON) (pp. 1-4). Chengdu, China.

Kiayani, A., Anttila, L., Zou, Y., & Valkama, M. (2012). Advanced receiver design for mitigating multiple RF impairments in OFDM systems: algorithms and RF Measurements. Journal of Electrical and Computer Engineering, 2012, 1-16.

Kiela, K., Jurgo, M., & Kladovščikov, L. (2016). Integrinių analoginių filtrų grandynų derinimosi sistemos projektavimas. Science ‒ Future of Lithuania / Mokslas ‒ Lietuvos ateitis, 8(3), 308-314.

Kiela, K. (2017). Integrinių analoginių filtrų belaidžio ryšio sistemoms kūrimas (daktaro disertacija). Vilniaus Gedimino technikos universitetas, Vilnius.

Kitsunezuka, M., Tokairin, T., Maeda, T., & Fukaishi, M. (2011). A Low-IF/Zero-IF reconfigurable analog baseband IC with an I/Q imbalance cancellation scheme. IEEE Journal of Solid-State Circuits, 46(3), 572-582.

Ko, Y., & Stapleton, S. (2011). Gain and phase mismatch effects on double image rejection transmitter. IET Circuits, Devices & Systems, 5(3), 212-221.

Li, X., Le Cui, X., Wang, B., & Lee, C. (2012, October). A 100MHz PGA with DC offset cancellation for UWB receiver. 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (pp. 1-3). Xi’an, China.

Lopelli, E., Spiridon, S., & van der Tang, J. (2011, February). A 40nm wideband direct-conversion transmitter with sub-sampling-based output power, LO feedthrough and I/Q imbalance calibration. 2011 IEEE International Solid-State Circuits

Conference (pp. 424-426). San Francisco, CA, USA.

Luo, J., Kortke, A., & Keusgen, W. (2009, July). Joint calibration of frequency selective time variant I/Q-imbalance and modulator DC-offset error in broadband direct-conversion transmitters. 2009 International Conference on Communications, Circuits and Systems (pp. 255-259). Milpitas, CA, USA.

Oimins, X., Xueqing, H., Pens, G., Jun, Y., Shi, Y., Dai, F., & Jaeser, R. (2006, May). A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver. 2006 IEEE International Symposium on Circuits and Systems (pp. 4). Island of Kos, Greece.

Onabajo, M., & Silva-Martinez, J. (2012). Analog circuit design for process variation-resilient systems-on-a-chip. New York: Springer.

Oshima, T., Maio, K., Hioe, W., & Shibahara, Y. (2004). Novel automatic tuning method of RC filters using a digital-DLL technique. IEEE Journal of Solid-State Circuits, 39(11), 2052-2054.

Pang, J., Maki, S., Kawai, S., Nagashima, N., Seo, Y., Dome, M., Kato, H.; Katsuragi, M.; Kimura, K.; Kondo, S.; Terashima, Y., Liu, H., Siriburanon, T., Narayanan, A., Fajri, N., Kaneko, T., Yoshioka, T., Liu, B., Wang, Y., Wu, R., Li, N. Tokgoz, K.; Miyahara, M.; Okada, K.; Matsuzawa, A. (2017, February). 24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance. 2017 IEEE International Solid-State Circuits Conference (ISSCC) (pp. 424-425). San Francisco, CA, USA.

Parssinen, A. (2011). Multimode-multiband transceivers for next generation of wireless communications. 2011 Proceedings of the ESSCIRC (ESSCIRC) (pp. 25-36).

Pérez, J., Calvo, B., & Celma, S. (2010). A high-performance CMOS feedforward AGC Circuit for a WLAN receiver. IEEE Transactions on Industrial Electronics, 57(8), 2851-2857.

Razavi, B. (1997). Design considerations for direct-conversion receivers. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 44(6), 428-435.

Rodriguez, S., Rusu, A., Zheng, L., & Ismail, M. (2008). CMOS RF mixer with digitally enhanced IIP2. Electronics Letters, 44(2), 121.

Shuhei, Y., Boric-Lubecke, O., & Lubecke, V. (2008, June). Cancellation techniques for LO leakage and Dc offset in direct conversion systems. 2008 IEEE MTT-S International Microwave Symposium Digest (1191-1194). Atlanta, GA, USA.

Song, Y., Yu, X., Jin, Z., & Chi, B. (2014, August). A 49-dB DR wide locking range hybrid AGC for an ISM-band receiver in 0.18 um CMOS. 2014 IEEE International Symposium on Radio-Frequency Integration Technology (pp. 1-3). Hefei, China.

Svitek, R., & Raman, S. (2005). DC offsets in direct-conversion receivers: characterization and implications. IEEE Microwave Magazine, 6(3), 76-86.

Tien-Yu, L., & Chi-Hsiang, L. (2014). 1-V 365uW 2.5-MHz Channel Selection Filter for 3G Wireless Receiver in 55-nm CMOS. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22(5), 1164-1169.

Vahidfar, M., & Shoaei, O. (2008). A High IIP2 Mixer enhanced by a new calibration technique for Zero-IF Receivers. IEEE Transactions on Circuits and Systems II: Express Briefs, 55(3), 219-223.

van Liempd, B., Borremans, J., Martens, E., Cha, S., Suys, H., Verbruggen, B., & Craninckx, J. (2014). A 0.9 V 0.4–6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration. IEEE Journal of Solid-State Circuits, 49(8), 1815-1826.

Wang, R., Lin, M., Wang, H., & Sun, S. (2016). A widely tunable active-RC complex filter for multi-mode wireless receivers with automatic frequency tuning. IEICE Electronics Express, 13(18), 1-11.

Xiangning, F., Da, C., & Yangyang, F. (2010a, September). A switch controlled resistor based CMOS PGA with DC offset cancellation for WSN RF chip. 2010 International Symposium on Signals, Systems and Electronics (pp. 1-4). Nanjing, China.

Xiangning, F., Yutao, S., & Yangyang, F. (2010b, September). A CMOS DC offset cancellation (DOC) circuit for PGA of low IF wireless receivers. 2010 International Symposium on Signals, Systems and Electronics (pp. 1-4). Nanjing, China.

Xiaojie, C., Min, L., Zheng, G., Yin, S., & Fa Foster, D. (2010, September). A CMOS programmable gain amplifier with a novel DC-offset cancellation technique. IEEE Custom Integrated Circuits Conference 2010 (pp. 1-4). San Jose, CA, USA.

Xiaoman, W., Baoyong, C., & Zhihua, W. (2010). A low-power high-data-rate ASK if receiver with a digital-control AGC loop. IEEE Transactions on Circuits and Systems II: Express Briefs, 57(8), 617-621.

Ximenes, A., & Swart, J. (2011, October). Analog automatic gain control (AGC) CMOS WLAN direct conversion receiver (DCR). 2011 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC 2011) (pp. 185-190). Natal, Brazil.

Xu, Y., Chi, B., Yu, X., Qi, N., Chiang, P., & Wang, Z. (2012a). Power-scalable, complex bandpass/low-pass filter with I/Q imbalance calibration for a multimode GNSS receiver. IEEE Transactions on Circuits and Systems II: Express Briefs, 59(1), 30-34.

Xu, Y., Qi, N., Chen, Z., Chi, B., Wang, Z. (2012b, May). A hybrid approach to I/Q imbalance self-calibration in reconfigurable low-IF receivers. 2012 IEEE International Symposium on Circuits and Systems (pp. 552-555). Seoul, South Korea.

Xu, Q., Hu, X., Jan, Y., Shi, Y., Dai, F., & Jaeger, R. (2007 September–October). A direct-conversion mixer with a DC-offset cancellation for WLAN. 2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. Boston, MA, USA.

Ziomek, C. D., & Hunter, M. T. (2012). Extending the Useable Range of Error Vector Magnitude (EVM) Testing. ZTEC Instruments, Inc. Albuquerque, New Mexico, USA.